1. Technical Field
The present invention relates to semiconductor device packages and, more specifically, to a semiconductor device package having a groove to prevent void formation between a semiconductor chip and a printed circuit board.
2. Description of the Related Art
With the recent trend toward higher integration of semiconductor devices as well as miniaturization and multi-functionalization of electronic appliances, there is a requirement for a variety of semiconductor device packaging technologies. For instance, mounting of bare chips is often conducted as a high-density mounting method for specific applications that require high performance. However, a bare chip package suffers from problems such as difficulty in quality assurance of the bare chips, establishment and standardization of package technologies by users, and reliability guarantee issues after packaging the bare chips. Therefore, the bare chip package is not widely utilized.
In view of the foregoing requirements, a variety of semiconductor device packages have been developed. One of the semiconductor device packages is a ball grid array package (BGA package), which is a high-density surface mount technology (SMT) package where a printed circuit board (PCB) is used instead of a lead frame and an external lead is not needed. As input/output terminals of a semiconductor device are increasing in number, recent attention has been focused on the BGA package where ball-type protrusive terminals are formed on an entire bottom surface of the semiconductor device package.
Typical configurations of a BGA package are characterized in that, instead of leads, solder balls are used as connection terminals to electrically connect a semiconductor chip and a main board to each other. BGA packages are classified into ceramic BGA (CBGA) packages, plastic BGA (PBGA) packages, tape BGA (TBGA) packages, metal BGA (MBGA) packages, and fine pitch BGA (FPBGA) packages.
Semiconductor device packages are becoming lighter, thinner, shorter, and smaller. For this reason, most adhesive materials used to adhere a semiconductor chip (or die) to a PCB are changing to film-type materials that advantageously provide a lower profile of the semiconductor device package and are suitable for a thin semiconductor wafer. However, defects may occur in the case where a film-type adhesive material is used. One of the typical defects is a swelling phenomenon, which is due to the delamination resulting from a void formed at the boundary between the semiconductor chip and the PCB. The swelling phenomenon has an adverse effect on the reliability of the package. The swelling phenomenon occurring between the lowermost semiconductor chip of a stacked chip semiconductor device package and the PCB is the most common defect occurring in the semiconductor device package. The present invention addresses these and other disadvantages of the conventional art.